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For more information contact:
John Ford
Virtual Silicon Technology
(408) 548-2737
johnf@virtual-silicon.com
Lou Covey
VitalCom Marketing and PR
(650) 637-8212 x202
lou@vitalcompr.com


VIRTUAL SILICON DELIVERS DATAPATH OPTIMIZED SOC IP

Circuits provide high-performance arithmetic functions preferred by Synopsys' Module Compiler


SUNNYVALE, Calif., - September 4, 2001 - Virtual Silicon Technology Inc., a leader in semiconductor intellectual property, today introduced a new set of semiconductor intellectual property (IP) to develop high-performance datapath structures for systems-on-chip (SoC). The eSi-Route/Datapath standard-cell set, used with Synopsys' Module Compiler™, enables design engineers to easily achieve timing closure where other techniques have failed, reduce die area and cut months from design schedules. The eSi-Route/Datapath set is most useful to designers of high-speed graphics, DSP, and communications systems where algorithmic solutions and their module layouts can be enhanced by higher level arithmetic cells. These new products can be combined with Virtual Silicon's existing high-speed components to create SoCs that offer both high performance and fast time to market. Virtual Silicon's high performance datapath IP significantly reduces the circuit delay through arithmetic functions such as adders, multipliers and multiplexors without the expense, time and risk of custom datapath design.

"Module Compiler automates and simplifies high-performance datapath design, and delivers best quality of results using advanced synthesis and optimization techniques" said Ken Hsieh, product marketing manager for Module Compiler at Synopsys. "Module Compiler's integration within Synopsys' Physical Compiler™ also enables structure placement for datapath modules within a fully integrated placement flow," continued Mr. Hsieh. "Virtual Silicon's eSi-Route/Datapath product takes full advantage of the algorithmic and placement features in Module Compiler and provides an optimal process-specific solution."

"Our SoC designers need to get the last ounce of performance from our silicon to achieve our performance goals-and still meet our aggressive product delivery schedules", said John Szetela, manager of CAD systems engineering at AMD. "Virtual Silicon's eSi-Route/Datapath IP gave us that extra advantage to allow us to achieve our performance and schedule goals."

"Virtual Silicon's eSi-Route/Datapath achieves high-performance datapath structures in SoC designs without costly custom development", said John Ford, vice president of marketing for Virtual Silicon. "The combination of Virtual Silicon's IP and Synopsys' Module Compiler EDA tool enable designers to get superior results without missing their market windows."

Availability and Pricing
The new product includes more than 70 standard cells optimized for the UMC L180 0.18-micron process. Other process implementations are in development. The IP may be licensed directly from Virtual Silicon with a list price of $79,000.

About Virtual Silicon Technology
Virtual Silicon is a leading supplier of semiconductor intellectual property to manufacturers and designers of complex systems-on-chip (SoC). Headquartered in Sunnyvale, CA, the company provides process-specific embedded components that serve the wireless, networking, graphics, communication and computing markets. Customers include leading fabless semiconductor companies, integrated semiconductor manufacturers, foundries, and SoC developers who demand leading edge technology for their semiconductor innovations. For more information, call (408) 548-2700 or visit Virtual Silicon online at www.virtual-silicon.com


eSi-Route, eSi-Pad, eSi-RAM, eSi-ROM, eSi-PLL, The Heart of Great Silicon, Silicon Ready, and Virtual Silicon are trademarks of Virtual Silicon Technology, Inc. Synopsys is a registered trademark of Synopsys, Inc. Module Compiler and Physical Compiler are trademarks of Synopsys, Inc.
Copyright 2001, Internet Business Systems, Inc.
1-888-44-WEB-44 --- marketing@ibsystems.com